雜志介紹

Iet Computers And Digital Techniques雜志介紹

《Iet Computers And Digital Techniques》是一本以English為主的開放獲取國際優(yōu)秀期刊，中文名稱計算機(jī)與數(shù)字技術(shù)，本刊主要出版、報道計算機(jī)科學(xué)-COMPUTER SCIENCE, HARDWARE & ARCHITECTURE領(lǐng)域的研究動態(tài)以及在該領(lǐng)域取得的各方面的經(jīng)驗和科研成果，介紹該領(lǐng)域有關(guān)本專業(yè)的最新進(jìn)展，探討行業(yè)發(fā)展的思路和方法，以促進(jìn)學(xué)術(shù)信息交流，提高行業(yè)發(fā)展。該刊已被國際權(quán)威數(shù)據(jù)庫SCIE收錄，為該領(lǐng)域相關(guān)學(xué)科的發(fā)展起到了良好的推動作用，也得到了本專業(yè)人員的廣泛認(rèn)可。該刊最新影響因子為1.1，最新CiteScore 指數(shù)為3.5。

英文介紹

Iet Computers And Digital Techniques雜志英文介紹

IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test.

The key subject areas of interest are:

Design Methods and Tools: CAD/EDA tools, hardware description languages, high-level and architectural synthesis, hardware/software co-design, platform-based design, 3D stacking and circuit design, system on-chip architectures and IP cores, embedded systems, logic synthesis, low-power design and power optimisation.

Simulation, Test and Validation: electrical and timing simulation, simulation based verification, hardware/software co-simulation and validation, mixed-domain technology modelling and simulation, post-silicon validation, power analysis and estimation, interconnect modelling and signal integrity analysis, hardware trust and security, design-for-testability, embedded core testing, system-on-chip testing, on-line testing, automatic test generation and delay testing, low-power testing, reliability, fault modelling and fault tolerance.

Processor and System Architectures: many-core systems, general-purpose and application specific processors, computational arithmetic for DSP applications, arithmetic and logic units, cache memories, memory management, co-processors and accelerators, systems and networks on chip, embedded cores, platforms, multiprocessors, distributed systems, communication protocols and low-power issues.

Configurable Computing: embedded cores, FPGAs, rapid prototyping, adaptive computing, evolvable and statically and dynamically reconfigurable and reprogrammable systems, reconfigurable hardware.

Design for variability, power and aging: design methods for variability, power and aging aware design, memories, FPGAs, IP components, 3D stacking, energy harvesting.

Case Studies: emerging applications, applications in industrial designs, and design frameworks.